Senior Lead -Chip SoC Layout & Integration Engineer
Listed on 2026-10-17
-
Engineering
Systems Engineer, Electronics Engineer, Test Engineer, Hardware Engineer
Intel Corporation in Hillsboro, OR is seeking an experienced engineer for the X-Chip Full-Chip Integration team to lead full-chip floor planning, layout integration, and tapeout for advanced-node silicon development vehicles.
You will develop custom layout methodologies, drive physical verification, collaborate with PDK and EDA teams, and advance designs through tape-in and silicon validation. Strong scripting and cross-functional collaboration are essential.
We are looking to fill the Senior Lead Full-Chip SoC Layout & Integration Engineer position at Intel Corporation in Hillsboro, OR, United States.
We are seeking a motivated Senior Lead Full-Chip SoC Layout & Integration Engineer to join Intel Corporation in Hillsboro, OR, United States.
Consider building your career as a Senior Lead Full-Chip SoC Layout & Integration Engineer at Intel Corporation.
The Senior Lead Full-Chip SoC Layout & Integration Engineer position in the Engineering field is open for applications.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).