Principal Logic Design Engineer - Hybrid Memory Controller
Listed on 2026-10-21
-
Engineering
Systems Engineer, Test Engineer, Electronics Engineer, Hardware Engineer
Rambus, a premier chip and silicon IP provider, seeks a Principal Logic Design Engineer in Hillsboro, Oregon. You will lead RTL design for high-performance memory controllers and define micro-architecture, reporting to the Director of Engineering as an IC contributor.
The role emphasizes deep System Verilog/Verilog expertise, collaboration with verification and physical design teams, and a hybrid work model with three onsite days per week. Strong communication is required.
We have an opening for a Principal Logic Design Engineer
- Hybrid Memory Controller in Hillsboro, OR, United States within Engineering.
The advertised compensation is 127..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Principal Logic Design Engineer
- Hybrid Memory Controller role in the description above.
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