×
Register Here to Apply for Jobs or Post Jobs. X

Principal Design Engineer, TSV Packaging

Job in Idaho City, Boise County, Idaho, 83631, USA
Listing for: Micron Technology
Full Time position
Listed on 2025-12-17
Job specializations:
  • Engineering
    Mechanical Engineer, Manufacturing Engineer, Process Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below
Location: Idaho City

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Department Intro

The Advanced Packaging Technology Development (APTD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage Interconnects and Packaging solutions that transform how the world uses information. Micron is dedicated to developing innovative processes and technologies that enable the creation of next‑generation semiconductor products which drive the AI revolution. By collaborating closely with our global R&D, equipment and materials suppliers, and manufacturing teams, we ensure the efficient development, transfer and implementation of new technology nodes, maintaining Micron's leadership in the industry.

Position Overview

We are seeking an experienced Design Engineer to join our TSV Packaging team. High‑performance memory devices like HBM, RDIMM/LRDIMM and CAMM modules, graphics GDDR packages and other Micron architectures require extensive engineering analysis and design to meet the mechanical requirements of the future. Finite element analysis of package design enables innovation and development of outstanding solutions to help foster our goals.

Utilization of FEA techniques and their application to our industry will make Micron more impactful and relevant. Key aspects of this role will be to innovate, influence, collaborate, partner, and implement.

Responsibilities
  • Stay up-to-date on semiconductor and advanced electronics packaging technologies like High Bandwidth Memory (HBM) and Flip Chip.
  • Detailed understanding of thermal compression bonding process for chip‑on‑wafer and wafer‑to‑wafer hybrid bonding process and the corresponding Multiphysics mechanisms involved to capture in the simulation.
  • Collaborate daily with global teams in product design, engineering, technology, and business units to analyze manufacturing processes using simulation.
  • Understanding of packaging materials and their production processes. Work with internal/external vendors and testing labs to craft and implement effective testing procedures to characterize materials for simulation analysis.
  • Maintain an understanding of measurement methodologies and coordinate measurement data collection of packages and packaging materials for correlation of simulation activities.
  • Develop semiconductor packages with advanced EDA techniques and simulation tools like ANSYS, Icepak, Flotherm.
Minimum Qualifications
  • 8+ years working experience in Mechanical and Thermo‑mechanical finite element analysis, modeling and validation of electronic packages in Semiconductor industry or equivalent.
  • Engineering tools: ANSYS Workbench, APDL, Abaqus, ProE or equivalent experience, AutoCAD, Solid Works, MATLAB.
  • M.S. / Ph.D. in Mechanical Engineering, Material science, or related Engineering field.
  • Good documentation/reporting skills and the ability to build and improve simulation and procedures for accurate and repeatable results.
  • Seeking a dedicated, motivated individual to balance tasks efficiently and work well in a team.
Preferred Qualifications
  • Simulation, modeling, and analysis of thermos‑mechanical problems by multi‑physics with software like Ansys, COMSOL, etc.
  • Proven academic training and research experience in Solid and fluid mechanics.
  • Experience in performing fracture simulations for IC packages.
  • Experience in semiconductor process simulation like wafer‑to‑wafer bonding process, thermal compression bonding process, mass reflow process, die ejection process, etc.
  • Ability to bring to bear the distributed team members and develop new characterization methods for new designs.
  • Knowledge in product reliability tests like thermal cycling, and other environmental stresses.
  • Mechanical design capability (2D, 3D) with Solid Works, AutoCAD, etc.
  • Data acquisition experience and numerical analysis proficiency in MATLAB, Excel, JMP, etc.
Benefits

Micron benefits are designed to help you stay well, provide…

To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary