Semiconductor Process Engineer - CMP, Photolithography, or PECVD

Position Title:Semiconductor Process Engineer - CMP, Photolithography, or PECV

Location: Odon, IN

Job Type: Permanent, Full-time, Onsite

Division: NHanced

Quantum Computing Inc. (QCi) (Nasdaq: QUBT) is an innovative, integrated photonics company that provides accessible and affordable quantum machines to the world today. QCi products are designed to operate at room temperature and low power at an affordable cost. The Company’s portfolio of core technology and products offers unique capabilities in high-performance computing, artificial intelligence, cybersecurity, and remote sensing applications.

We are hiring Process Engineers to support a growing 200mm silicon interposer manufacturing operation. Opportunities are available in three process areas: chemical mechanical planarization (CMP), photolithography, and plasma-enhanced chemical vapor deposition (PECVD).

Candidates should have experience in at least one of these areas. Experience across all three is not required.

These positions involve hands-on process development, qualification, troubleshooting, and manufacturing support in a low-volume fab startup environment.

• Develop, qualify, and maintain processes within the assigned area.
• Establish process recipes, operating windows, and acceptance criteria based on product requirements.
• Plan and execute experiments to evaluate materials, process settings, and equipment performance.
• Analyze inspection and metrology data to identify sources of variation and improve process performance.
• Investigate defects and process excursions, determine root causes, and implement corrective actions.
• Support equipment installation, acceptance, and process qualification in coordination with equipment engineers and vendors.
• Work with process integration and adjacent process teams to address compatibility between fabrication steps.
• Write and maintain process specifications, operating procedures, qualification reports, and engineering records.
• Train technicians and operators on process execution and troubleshooting.
• Follow cleanroom, chemical handling, and equipment safety procedures.

Engineers in this role will develop and support planarization processes for interposer fabrication.

Responsibilities include:

• Develop polishing recipes for dielectric and/or metal films, including selection and evaluation of slurries, pads, and conditioning parameters.
• Establish removal rates, uniformity, and process repeatability while controlling dishing, erosion, scratches, and other polishing defects.
• Develop and optimize post-CMP cleaning processes to control particles and residues.
• Evaluate film thickness, surface condition, and topography before and after polishing.
• Investigate process changes associated with consumable condition, equipment performance, and incoming wafer variation.

Relevant experience includes CMP process development or manufacturing support, polishing consumables, post-CMP cleaning, and associated metrology. Experience with either dielectric or metal CMP is applicable.

Engineers in this role will develop and support patterning processes using i-line steppers and contact aligners.

Responsibilities include:

• Develop processes for wafer preparation, photoresist coating, baking, alignment, exposure, and development.
• Establish process windows that meet feature dimension, overlay, resist profile, and defect requirements.
• Create and maintain exposure recipes and alignment strategies.
• Evaluate photoresists and process compatibility with subsequent etching, deposition, or plating steps.
• Troubleshoot adhesion problems, dimensional variation, alignment errors, incomplete development, and other patterning defects.

Relevant experience includes photolithography process development or manufacturing support using any exposure technology. Previous experience with i-line steppers or contact aligners is preferred but is not required.

Engineers in this role will develop and support dielectric film deposition processes.

Responsibilities include:

• Develop and qualify PECVD recipes for silicon dioxide, silicon nitride, and related dielectric films.
• Establish process windows for film thickness, uniformity, stress, refractive index, and other properties required by the application.
• Evaluate the effects of deposition conditions on wafer bow, film adhesion, and compatibility with subsequent processing.
• Investigate particles, film defects, process drift, and…