DSP & Communications Algorithms Engineer; Ethernet​/PHY

Our client is a global infrastructure technology leader built on more than 60 years of innovation within the semiconndutor and Manufacturing space for communications.

They are urgently seeking multiple engineers from

• Jr. PhD graduates with Solid therotical & relevant DSP experience
• Mid-level MS degrees with 5+ years in DSP and commubication algorithm development knowledge and experience and Ethernet PHY design
• Sr. level Digital Signal Processing (DSP) R&D Engineer with Ethernet and WIRELINE to join their growing team.

• Develop specification, architecture, and micro-architecture of digital signal processing and communications algorithms
• Bit-exact MATLAB / Simulink and C / C++ system modeling and simulation
• Develop and run system level simulation suites of the copper Ethernet PHY transceivers and perform vector matching verification with RTL simulations
  • Define and document chip requirements, architecture, verification and lab test plan
• Lab testing and debug of ASICs
• Documentation / application note development and customer support

• BS Degree in Electrical engineering is a MUST . with 10+ years experience, Master's in Elecetrical Engineering and 3+ years of related experience;or PhD in Digital Signal Processing is a MUST
• Knowledge in Communication Theory & Digital Signal Processing algorithms
• Experience in equalizers, Timing Recovery, Echo Cancellation and Gain Control algorithms

• Experience in Wireline Algorithms -
• Experience in Ethernet 802.3 PHY Transceivers
• Experience in C / C++, MATLAB / Simulink,
• Experience architecting communications systems for high performance ASIC based products is highly desirable
• Good hands‑on skills in the lab
• Good oral and written communication skills

• 140-180K
• full medical, dental, Vision
• 401K
• PTO
• Bonus potential

Motion Recruitment Partners