Sr. Product Engineer

Location:

Irvine, CA, United States
Date Posted:
Sep 29, 2026

Synaptics is leading the charge in AI at the Edge, bringing AI closer to end users and transforming how we engage with intelligent connected devices, whether at home, at work, or on the move. As the go-to partner for the world's most forward-thinking product innovators, Synaptics powers the future with its cutting-edge Synaptics Astra AI-Native embedded compute, Veros wireless connectivity, and multimodal sensing solutions.

We're making the digital experience smarter, faster, more intuitive, secure, and seamless. From touch, display, and biometrics to AI-driven wireless connectivity, video, vision, audio, speech, and security processing, Synaptics is the force behind the next generation of technology enhancing how we live, work, and play.

Synaptics is seeking a Sr. Staff Product Engineer to lead product engineering activities from new product introduction through high-volume manufacturing and full product lifecycle support. This role will own technical execution across silicon bring-up, characterization, qualification, yield improvement, production release, customer quality support, manufacturing optimization, budget and sustaining. You will serve as an experienced technical owner across Design, Test, Validation, Quality, Reliability, Operations, Foundry, OSAT, Marketing, and Customer Quality teams.

This position requires strong semiconductor product engineering depth, practical cost awareness, data-driven decision making, and the ability to independently drive complex cross-functional issues to closure. This position reports to the Director of Test & Product Engineering.

The typical base pay range for this position is USD $140,000 - $221,100 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and does not include bonus, equity, or benefits.

• Own product engineering execution from NPI through silicon bring-up, characterization, qualification, volume ramp, mass production, sustaining, and end-of-life support
• Lead cross-functional teams across Design, Test, Validation, Quality, Reliability, Operations, Foundry, OSAT, Marketing, and Customer Quality to drive product readiness and lifecycle execution including qualification setup issues, failures, and schedule risks
• Define and drive characterization plans across process, voltage, temperature, frequency, power, and functional operating conditions
• Drive yield improvement, test time reduction, and manufacturing efficiency initiatives to improve product cost, quality, and production performance
• Identify and execute practical cost-based opportunities
• Drive bench-to-ATE correlation for key electrical, functional, RF, mixed-signal, power, and system-level parameters as applicable
• Define and execute silicon and package qualification plans for consumer, industrial, and automotive products, including JESD
  47 and AEC-Q100 requirements.
• Lead qualification hardware readiness, including HTOL, bHAST, ESD boards
• Partner with Design and Test teams on DFT, test coverage, diagnostics, test time reduction, and cost-effective screening strategies
• Validate test programs, test hardware, ATE platforms, OSAT readiness, and production flows using GRR, correlation, and statistical analysis
• Lead technical reviews for silicon bring-up, qualification readiness, production release, yield excursions, customer returns, sustaining issues, and corrective actions
• Drive root cause analysis for yield excursions, low-yield lots, customer returns, RMAs, production quality issues, and test coverage gaps
• Support customer quality, failure analysis, 8D investigations, and closure of technical issues with clear data-based recommendations
• Mentor Product Engineers and provide technical guidance across multiple projects and product families
• Deep technical understanding of silicon and package qualification hardware design, including HTOL, bHAST, ESD boards
• Strong understanding of HTOL execution flow, including stress condition definition, socket and board readiness, pattern preparation, burn-in setup, read-point execution, data review, and post-stress disposition
• Ability to define qualification plans, review stress requirements, identify hardware and pattern risks, and drive…