Senior Physical Design Engineer – Tapeout Leader
Listed on 2026-11-04
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Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer, Electrical Engineering
Celero Communications in Irvine, CA is seeking an experienced Physical Design Engineer to lead physical implementation of SoCs, including floor planning, power planning, P&R, CTS, timing closure, and sign-off.
Collaborate with architecture, RTL, circuit and verification teams to deliver high-performance chips; mentor engineers and define physical design methodologies to ensure tape-out of next-generation semiconductor products.
We are currently recruiting a Senior Physical Design Engineer – Tapeout Leader for our team in Irvine, CA, United States.
We would love to welcome a new Senior Physical Design Engineer – Tapeout Leader to our organisation in Irvine, CA, United States.
For the Senior Physical Design Engineer – Tapeout Leader position at Celero Communications, we are reviewing applications now.
Step into the Senior Physical Design Engineer – Tapeout Leader role at Celero Communications in Irvine, CA, United States and grow with us.
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