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Senior Image Processing Engineer — FPGA​/GPU

Job in Irvine, Orange County, California, 92713, USA
Listing for: Adsys Controls, Inc.
Full Time position
Listed on 2026-11-04
Job specializations:
  • Engineering
    Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 150000 USD Yearly USD 120000.00 150000.00 YEAR
Job Description & How to Apply Below

Adsys Controls, Inc. seeks an experienced image processing engineer to develop algorithms for industrial, medical imaging, robotic, and aerospace applications.

The work uses Matlab/Simulink with the goal of porting to FPGA, Processor, DSP, or GPU, while expecting independent effort in a fast-paced, highly technical environment. The candidate should have 5+ years in image processing, a BS in EE or CS (MS preferred), experience with Matlab, strong documentation skills, and be a US citizen or

This posting is for the Senior Image Processing Engineer — FPGA/GPU role at Adsys Controls, Inc., based in Irvine, CA, United States.

We are seeking a motivated Senior Image Processing Engineer — FPGA/GPU to join Adsys Controls, Inc. in Irvine, CA, United States.

Consider building your career as a Senior Image Processing Engineer — FPGA/GPU at Adsys Controls, Inc.

Position Requirements
10+ Years work experience
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