Senior Chip Physical Verification Engineer — Space-Grade SoC
Listed on 2026-11-04
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Engineering
Electronics Engineer, Test Engineer, Hardware Engineer, Quality Engineering
jo .pro is looking for a Sr. Full Chip Physical Verification Engineer in Irvine, California. This role involves executing full-chip DRC, LVS, and ESD signoff while working on cutting-edge silicon technologies that support the Starlink network.
The ideal candidate has a Bachelor's degree in a relevant field and over 5 years of ASIC design experience with expertise in design verification methodologies. Competitive compensation includes comprehensive benefits and stock options.
Step into the Senior Chip Physical Verification Engineer — Space-Grade SoC role at SpaceX in Irvine, CA, United States and grow with us.
This opening is for the Senior Chip Physical Verification Engineer — Space-Grade SoC role at Space
X.
We are seeking a motivated Senior Chip Physical Verification Engineer — Space-Grade SoC to join SpaceX in Irvine, CA, United States.
Consider building your career as a Senior Chip Physical Verification Engineer — Space-Grade SoC at Space
X.
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