IC Layout Engineer Speed Analog & SoC IP
Listed on 2026-11-05
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Engineering
Electronics Engineer, Hardware Engineer
Media Tek Research Lab Inc. is looking for an Analog Layout Engineer in Irvine, California. The role involves developing high-quality layouts for data-converters and power management circuitry, and performing layout in CMOS or FinFET technologies.
Candidates should be proficient in Virtuoso and Calibre tools, with experience in high-speed circuits, and knowledge of N7/N5/N3 processes. Competitive compensation and benefits are offered, including health insurance and a 401(k) plan.
The IC Layout Engineer – High‑Speed Analog & SoC IP (Irvine) position in the Engineering field is open for applications.
Consider building your career as a IC Layout Engineer – High‑Speed Analog & SoC IP (Irvine) at Media Tek.
We have an opening for a IC Layout Engineer – High‑Speed Analog & SoC IP (Irvine) in Irvine, CA, United States within Engineering.
This role, IC Layout Engineer – High‑Speed Analog & SoC IP (Irvine) at Media Tek, could be your next career step.
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