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Sr Hardware Development Engineer

Job in Issaquah, King County, Washington, 98027, USA
Listing for: GCS Recruitment
Full Time position Listed on 2026-11-05
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 190000 USD Yearly USD 120000.00 190000.00 YEAR

Job Description & How to Apply Below

Job role:

The team designs the satellites' phased-array antenna electronics: meter-wide, 20+ layer boards carrying thousands of components - including three families of Amazon custom silicon (beamforming, modem, network processing) - linked by ~25 Gbps high-speed digital buses. Boards are coming back from fabrication faster than the design team can validate them. That's where you come in: senior EEs who can do real board design and own hardware in the lab.

  • Lead bring-up of newly fabricated boards: power-on, section-by-section checkout, first-time debug to root cause.
  • Plan and run design verification/validation campaigns - high-speed link testing, power measurements, functional test - and document results to program standards.
  • Partner daily with the design team; drive fixes into the next board revision.
  • Contribute to schematic and layout work on next-generation boards as bandwidth allows.
  • Hand off validated hardware to the RF/antenna team and support their measurement needs.
What we're looking for
  • Experience of EE board-level design: schematic capture, complex dense multilayer PCBs, power delivery and sequencing.
  • Hands-on lab strength - the heart of this role: board bring-up, debug, and validation; fluency with oscilloscopes, logic/protocol analyzers, and high-speed test gear.
  • High-speed digital experience: multi-gigabit Ser Des/interfaces (e.g., JESD
    204, PCIe, 25G+ Ethernet, DDR) and signal/power integrity awareness.
  • Full lifecycle experience: design - build - bring-up - validation - manufacturing support.
  • BSEE or MSEE (or equivalent experience).
Nice to have
  • Satellite, aerospace, or space-qualification experience; phased-array or radar hardware exposure.

Boards built around custom ASICs/SoCs; RF familiarity as a secondary skill; FPGA familiarity;
Python bench automation

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