Design Verification Engineer

Job-:
Engineering - Product Dev

Location:

Knoxville, TN, United States Posted: ECL/GTC

Required:

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Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Knoxville, TN.  In this role, you will develop and execute verification strategies that ensure first-pass silicon success for next-generation analog and mixed-signal ICs across industrial, automotive and consumer applications.

As a Design Verification Engineer, you will work across the full verification cycle – from developing detailed verification plans and building test benches through running coverage regressions, tracking closure and contributing to continuous improvements in DV methodology.  You will collaborate closely with analog design, digital design and systems engineering teams.

As a Design Verification Engineer in this role, you will be responsible for:

Developing detailed verification plans while working closely with the design and system team to ensure first pass silicon success

Developing test benches, tests and simulations at RTL and GLSDevelopment of System Verilog and Verilog-AMS behavioral models for analog circuits

Work with regression tools and develop scripts to submit cases for regression analysis

Running coverage regressions to meet the defined coverage goals

Tracking and communicating verification status, issues and concerns

Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows

Put your talent to work with us as a Design Verification Engineer!

Qualifications

Minimum requirements:

Bachelor’s degree in Electrical Engineering, Electrical and Computer Engineering, Computer Engineering or related field3+ years of experience in design verification or a related role

Preferred qualifications:

Experience with functional verification methodologies including simulation, assertions, and coverage-driven verification

Proficiency in System Verilog and UVM-based testbench development

Familiarity with RTL simulation tools (Cadence Xcelium, Synopsys VCS, or equivalent)

Experience with gate-level simulation and timing-aware verification flows Scripting skills for regression automation and verification flow development (Python, Tcl, or Perl)
Ability to quickly ramp on new systems and processes

Ability to take the initiative and drive for results

Ability to establish strong relationships with key stakeholders critical to success, both internally and externally

Strong verbal and written communication skills

Demonstrated strong interpersonal, analytical and problem-solving skills

Ability to work in teams and collaborate effectively with people in different functions

Strong time management skills that enable on-time project delivery

About the organization TI does not make recruiting or hiring decisions based on citizenship, immigration status or national origin. However, if TI determines that information access or export control restrictions based upon applicable laws and regulations would prohibit you from working in this position without first obtaining an export license, TI expressly reserves the right not to seek such a license for you and either offer you a different position that does not require an export license or decline to move forward with your employment.

About the company

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