Senior Physical Design Engineer - ASICs
Listed on 2026-10-07
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Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer
Tachyum in Las Vegas seeks a senior IC design engineer to drive ultra-high performance, low-power data-processing chips. You will work with RTL teams to meet aggressive PPA targets and contribute to floor planning, timing closure, and clock-tree design.
The role requires 5+ years in semiconductor design, Verilog expertise, and experience with Innovus. Strong collaboration skills and willingness to mentor junior engineers are essential.
We would love to welcome a new Senior Physical Design Engineer for High-Performance ASICs to our team in Las Vegas, NV, United States.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Physical Design Engineer for High-Performance ASICs role in the description above.
We appreciate your interest in this position.
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