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Senior Design Verification Engineer
Job in
1001, Lausanne, Canton de Vaud, Switzerland
Listed on 2026-01-29
Listing for:
IC Resources
Full Time
position Listed on 2026-01-29
Job specializations:
-
Engineering
Electronics Engineer, Engineering Design & Technologists, Systems Engineer, Software Engineer
Job Description & How to Apply Below
I'm seeking a Design
Verification Engineer to join an innovative, deep-tech AI company that is a recognised leader in its field.
- Develop design verification methodologies and implement standard debug flows
- Work with designers in verification of circuit designs
- Prepare design verification plan based on design specifications
- Plan and schedule assigned projects for timely completion
- Utilize the latest techniques, tools, and technologies for design verification activities
- Maintain design verification environment and track & close design bugs
- 5+ years’ experience in the semiconductor industry
- Proven track record in verifying complex designs (preferably in high volume applications) - FPGA or ASIC
- Familiarity with Ser Des and high-level protocols (e.g., PCle, USB, DP) would be advantageous
- Extensive digital verification background with some UVM experience.
- Pre-IPO stock options
- Opportunity to contribute to cutting-edge AI and semiconductor innovation
Tel -
Linked In -
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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