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Senior Formal Verification Engineer - FPGA​/ASIC

Job in 1001, Lausanne, Canton de Vaud, Switzerland
Listing for: European Tech Recruit
Full Time position
Listed on 2026-02-14
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 CHF Yearly CHF 80000.00 100000.00 YEAR
Job Description & How to Apply Below
A leading semiconductor company based in Lausanne is seeking a talented Formal Verification Engineer to develop formal verification methodologies and participate in RTL design reviews. The ideal candidate has over 5 years of experience in the semiconductor industry with a proven track record in verifying complex designs. You will work with design engineers and maintain the verification environment. This position offers opportunities in Switzerland along with flexibility to work out of the UK or Germany.
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Position Requirements
10+ Years work experience
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