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SerDes Analog Architect

Job in 1001, Lausanne, Canton de Vaud, Switzerland
Listing for: IC Resources
Full Time position
Listed on 2026-10-17
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 110000 - 160000 CHF Yearly CHF 110000.00 160000.00 YEAR
Job Description & How to Apply Below

I am exclusively recruiting for a Ser Des Architecture and Modelling Engineer to join my client’s team in Lausanne, Switzerland. This is a research and architecture-focused position for an engineer who enjoys investigating new ideas, developing algorithms and creating models to explore the performance of next-generation high-speed communication systems.

The role has a strong emphasis on research, innovation and developing new architectural concepts rather than simply implementing established designs.

As a Ser Des Architecture and Modelling Engineer, you will:
  • Research and develop new concepts for high-speed serial communication systems
  • Build system level models to investigate, compare and optimise new architectures
  • Develop signal processing algorithms and evaluate their impact on link performance
  • Use MATLAB, Python or C++ to model communication systems and test new ideas
  • Work with architects and IC designers to translate research concepts into practical transceiver architectures
  • Analyse system limitations including signal integrity, noise, power and clock recovery
  • Define link budgets and block-level specifications based on system requirements
  • Support analog, digital and verification teams throughout the development process

My client is looking for an engineer with a strong research background in signal processing, communications, control theory or mathematical modelling.

Relevant experience could include:
  • Research and development of new communication or signal processing techniques
  • Strong understanding of digital algorithms and control theory
  • Experience developing and implementing signal processing algorithms
  • System-level modelling of digital communication systems
  • Strong programming skills in MATLAB, Python or C++
  • Understanding of Ser Des, clock recovery or other high-speed communication systems
  • Knowledge of signal integrity and analog circuit behaviour
  • Experience with SPICE or Spectre would be useful

The role is aimed at someone with 5+ years of experience in semiconductor, telecommunications, communications research or scientific software development.

A Bachelor's degree or higher in Electrical Engineering, Electronic Engineering, Communications, Computer Science or a related field is expected.

The Ser Des Architecture and Modelling Engineer position would suit someone who enjoys working in an R&D environment, challenging existing approaches and turning research ideas into new system architectures.

The role requires a minimum of 3 days on-site in Lausanne.

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