Physical Design and Timing Engineer

Position: Physical Design and Timing Engineer Role
Enhance your professional journey with NVIDIA as a Senior Physical Design and Timing Engineer, specializing in CPUs, GPUs, and SoCs with an emphasis on performance and efficiency.

This role is ideal for engineers who excel in physical design and timing monitoring for high-frequency and low-power designs at various chip levels. You will be instrumental in the RTL to GDSII process, ensuring that timing convergence meets industry standards while collaborating with various teams for improved methodologies.

Key Responsibilities:

• Lead physical design efforts at block and full-chip levels

• Supervise timing analysis and constraints generation

• Work collaboratively with cross-functional teams

• Contribute to enhancing convergence methodologies

• Analyze crosstalk delay and noise glitches

Requirements:

• BS in Electrical or Computer Engineering with 5+ years of experience

• Thorough understanding of timing constraints management

• Proven track record with EDA tools and scripting

• Hands-on experience in design closure techniques

• Familiarity with process variation effect modeling

Bring your extensive background in physical design and timing analysis to NVIDIA’s innovative projects.
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