Staff Engineer Digital Verification and Methodology

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Turning customer whispers into industry shaking solutions... ready to amplify the
future?
As a Staff Engineer Digital Verification and Methodology  on our Customer
Collaboration and Technical Marketing team
work hand-in-hand with our customers,
enabling them to transform our products into
cutting-edge designs, all while building long-lasting partnerships that thrive on success.
Are you in?

Your role Staff
Engineer Digital Verification and Methodology:
Drive verification excellence
and scalable methodologies for complex IP, subsystem and SoC developments.
Partner with cross-functional teams to deliver robust, reusable verification
solutions that accelerate quality and time to market

Key responsibilities in your new role Define
verification concepts, strategies and measurable plans for
digital IP, subsystems and SoC projects

Develop and maintain System Verilog and UVM verification
environments, reusable components and Verification IPCreate verification specifications, test scenarios, assertions,
coverage strategies and closure criteria

Apply constrained-random, metric-driven and formal
verification techniques to validate complex designs

Lead methodology capabilities including roadmap definition, requirements,
implementation, documentation, enablement, adoption
and continuous improvement

Evaluate and apply AI-based methodologies for verification planning,
test generation, debug, coverage analysis, knowledge
reuse and workflow automation

Collaborate with concept, design, application engineering
and methodology teams to communicate technical direction, status,
risks and quality metrics

Your profile You
are a collaborative problem solver who communicates clearly and thrives in
cross-functional environments. You combine a structured, analytical mindset
with a passion for enabling others through robust methodology and automation

Qualifications and skills to help you succeed Mandatory:
Bachelor’s or Master’s degree in
Electrical Engineering, Computer Engineering, Computer Science or a related
field, or equivalent practical experience

Mandatory:
Demonstrated experience in digital verification
and verification methodology development for complex IP, subsystems or
So Cs Mandatory :
Expert knowledge of System Verilog and UVM
with a strong understanding of digital design, verification
architectures and constrained-random techniques

Mandatory:
Proven ability to develop verification environments
and reusable assets including specifications, assertions, coverage
strategies and Verification IPMandatory:
Strong analytical and debugging skills with the
ability to provide technical direction and collaborate across global
cross-functional teams;
English:
Written and spoken

Preferred:

Experience with formal and assertion-based
verification, firmware-driven verification, microcontroller-based
ICs or automotive, safety or security requirements

Nice-to-have:
Familiarity with regression automation and verification
infrastructure, mentoring or methodology adoption leadership,
or applying AI-based engineering approaches#LI-AOOAdditional information

Infineon Technologies is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, national origin, ancestry, citizenship, age, physical or mental disability, legally protected medical condition, family care status, military or veteran status, marital status, domestic partner status, sexual orientation, or any other basis protected by local, state, or federal laws.

Employment at Infineon is contingent upon proof of your legal right to work in the United States under applicable law, verification of…