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Principal Digital Verification Engineer​/Senior Principal Digital Verification Engineer - R10209925

Job in Linthicum, Anne Arundel County, Maryland, USA
Listing for: Northrop Grumman
Full Time position
Listed on 2025-12-03
Job specializations:
  • Engineering
    Systems Engineer, Software Engineer, Electronics Engineer, Test Engineer
Job Description & How to Apply Below
Position: Principal Digital Verification Engineer / Senior Principal Digital Verification Engineer - R10209925

✈️Sr. Talent Acquisition Business Partner I

Northrop Grumman, Mission Systems – CDR I (Contract). This position is available only to applicants with an active DoD Secret clearance and Special Program Access (SAP) and who can be reached via an  email address.

Relocation assistance may be available.
Travel
:
Yes, 10% of the time.
Clearance type
:
Secret.

Company Overview

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people’s lives around the world today, and for generations to come. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible.

About

the Role

Principal Digital Verification Engineer / Senior Principal Digital Verification Engineer (principal or senior principal). This role is based out of Linthicum, MD or Morrisville, NC. The position may be filled as a Principal Digital Verification Engineer or a Senior Principal Digital Verification Engineer.

What You’ll Do
  • Work closely with design and verification engineers and utilize modern verification methods, tools and techniques.
  • Perform functional verification of register transfer level (RTL) code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and System Verilog.
  • Develop testbench, tests, verification IP (VIP), verification models, coverage models, extensive simulation and debug, code coverage and functional coverage, generation and analysis of reports and metrics, and documentation.
  • Operate in a team environment and collaborate across different teams as required to accomplish the goals.
Basic Qualifications for a Principal Engineer
  • Bachelor’s degree with 5 years of experience, Master’s degree with 3 years of experience or PhD with 0 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
  • U.S. Citizenship is required.
  • The ability to obtain/maintain an active DoD Secret clearance and Special Program Access (SAP).
  • 3 years of experience with FPGA or ASIC verification using UVM.
  • Experience developing test plans, participating in reviews, test development and RTL debug.
Basic Qualifications for a Senior Principal Engineer
  • Bachelor’s degree with 8 years of experience, Master’s degree with 6 years of experience or PhD with 3 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
  • U.S. Citizenship is required.
  • The ability to obtain/maintain an active DoD Secret clearance and Special Program Access (SAP).
  • 3 years of experience with FPGA or ASIC verification using UVM.
  • Experience developing test plans, participating in reviews, test development and RTL debug.
Preferred Qualifications
  • Advanced Degree with at least 3+ years of professional experience in related industry.
  • Experience with data structures, object‑oriented programming languages and concepts.
  • Experience with Verification IP integration and/or development.
  • Experience with a coverage-driven verification methodology from planning through closure.
  • Knowledge of industry‑standard bus or I/O interfaces.
  • Experience with System Verilog Assertions (SVA).
  • FPGA/ASIC design and/or development process experience.
  • Experience with scripting languages (Bash, Perl, Python, Tcl, Makefile).
  • Knowledge of digital signal processing.
Benefits
  • 401(k)
  • Educational assistance
  • Life insurance
  • Employee Assistance Programs & Work/Life solutions
  • Paid time off
  • Health & wellness resources
  • Employee discounts
Compensation

Primary Level Salary Range: $ – $. Primary Level Salary Range: $ – $.

Secondary Level Salary Range: $ – $.

Additional Information

This position is contingent upon contract award. The application period for the job is estimated to be 20 days from the posting date.

EEO Statement

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions. For our complete EEO and pay transparency statement, please visit Northrop Grumman EEO.

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Position Requirements
10+ Years work experience
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