FPGA Hardware Engineer

Leidos has an exciting opportunity for a FPGA Hardware Designer Engineer within our National Security Sector's (NSS) Cyber & Analytics Business Area (CABA). Active TS/SCI clearance with a polygraph is required. Our team leads in Security Engineering, Computer Network Operations (CNO), Mission Software, Analytical Methods and Modeling, Signals Intelligence (SIGINT), and Cryptographic Key Management.

We offer competitive benefits, including Paid Time Off, 11 paid Holidays, 401K with a 6% company match and immediate vesting, Flexible Schedules, Stock Purchase Plans, Technical Upskilling, Education and Training Support, Parental Paid Leave, and more.
Join us and make a difference in National Security!

The FPGA Hardware Designer Engineer will support a high-performing program responsible for the full lifecycle of designing, programming, and testing cryptographic communication security modules. These modules are critical for protecting data across US and allied foreign data links, involving hardware and software development, requirements definition, design, implementation, testing, and system integration. The modules require Information Assurance certification and are embedded in systems like helicopters and UAVs.

• Bachelor's degree with 12+ years or Master’s with 10-13 years of relevant experience.
• Minimum of 7 years’ experience as a Hardware Design Engineer in integrated circuit or microelectronic component design.
• Active TS/SCI clearance with Polygraph
  ; U.S. citizenship required.

• FPGA design, Xilinx's Vivado, Microblaze Design Suite, Partial Reconfiguration, VHSIC, VHDL, LVDS, HSS.

Development of security products in the Cyber Intelligence field is highly sought after.

Original Posting: March 21, 2025

For U.S. positions, the job is expected to remain open for at least 3 days from the posting date.

Pay Range: $ - $

The pay range is a guideline; actual compensation depends on responsibilities, education, experience, skills, and other factors.