ASIC​/FPGA Design Engineer II

Overview

ASIC/FPGA Design Engineer location near Lockheed Martin Space facility (Cambridge MA site referenced in description). This position requires onsite work with a flexible 9x80 schedule in the office. Location options mentioned include Denver CO, Highlands Ranch CO, and Sunnyvale CA.

• Work with low SWaP, radiation hardened, space-rated devices.
• Perform all aspects of ASIC and FPGA development through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux-based high-performance computing environment.
• Support technical reviews and present to internal and external stakeholders.
• Interface with an independent verification team who will be working in parallel, verifying the design.

• Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
• Experience in the design of FPGAs, Digital ASICs, or Mixed-signal ASICs.
• HDL programming experience with VHDL, Verilog, and/or System Verilog.
• Linux development environment.
• Willing and able to obtain and maintain a DoD Secret clearance; US Citizenship required.
• 3+ years of professional experience.

This position requires a government security clearance; US Citizenship is required. Initial clearance may be obtained after hire, with ongoing maintenance as required by position.

Space is a critical domain, connecting technologies, security, and humanity. Lockheed Martin Space aims to harness space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve.

Shift
:
First;
Work Schedule
: 9x80 every other Friday off. Onsite full-time. Relocation/housing stipend available in some cases. Telework not supported for this position.

EEO Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.