PIC Design Engineer

Key Responsibilities

• Support Design and simulation activities of passive and active components within the Oriole PDK
• Work collaboratively within the Oriole PIC team on mask layout and support tape‑out cycles into a commercial foundry
• Support collaborative activities between Oriole and its suppliers
• Support Test, Characterisation and Design Verification of Oriole's PIC program, deliver data analysis and verification reports

• PhD in Physics with a focus on Photonics, Semiconductors or Optical Networks.
• Strong simulation skills in photonics (FDTD, EME) and hands on experience with commercial relevant software
• Strong Layout/Mask Design skills using commercial photonic layout tools (e.g. Synopsys, GDS Factory, Nazca, Klayout)
• Strong programming skills (Python), and familiar with version control methodology
• Experience in device physics and design of III‑V semiconductor optical devices such as lasers, optical amplifiers, modulators and detectors
• Experience on passive Si/SiN photonics design, simulation, layout and characterisation.
• A good understanding of photonic process integration and understanding of processing limitations on PIC performance (principles of design for manufacture)
• Use of ML/AI methodologies or other computational optimisation techniques in photonic design simulations

• Photonic device characterisation, hands on experience with testing methodologies for wafer level and die level test
• High speed RF design characterisation
• RF/Thermal simulation experience a plus.
• Good understanding of Optical networks and Applications of photonics for AI in data centres
• A good understanding of Photonic device manufacturing principles, Design for manufacture, Design for test and reliability.
• Good understanding of PIC parameter impact on system performance (e.g. such as BER, link budget, power penalties etc), any system modelling experience a plus.
• Excellent Communication and presentation skills, team working