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AI Accelerator ASIC Design Engineer; RTL/Verilog
Job in
Greater London, London, Greater London, W1B, England, UK
Listed on 2026-07-15
Listing for:
Oho Group
Full Time
position Listed on 2026-07-15
Job specializations:
-
Engineering
Hardware Engineer, Test Engineer, Electronics Engineer
Job Description & How to Apply Below
Location: Greater London
Oho Group is seeking an ASIC Design Engineer for an AI accelerator project in London. You will design RTL blocks for the accelerator in System Verilog/Verilog, collaborating with architecture and verification teams.
The role focuses on high-performance, power-efficient silicon, with responsibilities spanning compute, memory, and interconnect (AXI/NoC) as you contribute to microarchitecture decisions and optimise critical metrics.
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