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Senior ASIC Verification Engineer: SystemVerilog​/UVM, UPF

Job in Greater London, London, Greater London, W1B, England, UK
Listing for: Swediumglobal
Full Time position
Listed on 2026-07-24
Job specializations:
  • Engineering
    Test Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 120000 GBP Yearly GBP 90000.00 120000.00 YEAR
Job Description & How to Apply Below
Location: Greater London

Swedium Global Services is seeking an experienced ASIC Verification Engineer to join our growing verification team. You will lead System Verilog/UVM based verification, develop test plans, and verify UPF-powered features for complex ASIC/SoC designs.

Remote from EU position with 8+ years of related experience; strong debugging and collaboration with design teams are essential for timely verification closure and regression testing.

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Position Requirements
10+ Years work experience
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