Campus FPGA Engineer Intern: Ultra-Low-Latency Trading HW
Listed on 2026-10-11
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Engineering
Hardware Engineer, AI Engineer (Applied/Software)
Amsterdam Quant Society in London is offering an FPGA internship to build ultra-low-latency hardware for trading, networking, high-performance computing, and real-time acceleration using RTL and low-level systems skills.
The role covers FPGA and systems design for ultra-low-latency trading applications, networking and HPC, with hardware acceleration for trading, machine learning, and other algorithms. International students are encouraged to apply.
The Campus FPGA Engineer Intern:
Ultra-Low-Latency Trading HW role at Amsterdam Quant Society is now open for applications in Greater London, England, United Kingdom.
Learn more about the Campus FPGA Engineer Intern:
Ultra-Low-Latency Trading HW role in the description above.
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