Machine Learning​/AI Engineer, Hardware

Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.

Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.

As a company, we constantly challenge what’s possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

Rivian is looking for a Staff Machine Learning/AI Engineer to help expand the capabilities of our ML application and compiler ecosystem for edge AI platforms. This role is intended for a senior technical leader who can strengthen our ability to port a broad set of models onto RAP1-class platforms, improve model enablement infrastructure, and help shape the next phase of our hardware-software roadmap.

The role sits at the intersection of machine learning, model optimization, compiler/toolchain development, and hardware‑aware deployment. The ideal candidate brings deep experience building practical inference systems, understands the realities of deploying large and vision‑heavy models on constrained edge hardware, and can partner closely with ML, compiler, and silicon teams to raise both technical depth and execution velocity.

• Lead development of machine learning enablement workflows for Rivian edge AI platforms.
• Build and improve front‑end compiler and model‑ingestion tooling needed to support a broad model zoo on RAP1 and future platforms.
• Develop and scale robust quantization‑aware training and model optimization infrastructure.
• Port, optimize, validate, and benchmark machine learning models for deployment on hardware accelerators and NPU‑class architectures.
• Improve performance across memory, scheduling, sparsity, and data‑movement constraints in close collaboration with hardware and systems teams.
• Create methods to evaluate model fidelity and deployment quality across floating‑point and quantized paths, including accuracy, error, and performance tradeoffs.
• Work across software, compiler, architecture, and product teams to identify the highest‑value workloads and accelerate customer‑relevant enablement.
• Provide technical leadership and mentoring for engineers working on model deployment, compiler infrastructure, and hardware‑aware ML.
• Help shape the long‑term direction of Rivian’s edge AI stack, including support for increasingly large and complex neural network models.

• Deep experience in machine learning systems, model deployment, or AI infrastructure.
• Strong background in model optimization for edge or accelerated inference, including quantization and performance tuning.
• Experience building or extending compiler, toolchain, or graph‑transformation infrastructure for ML workloads.
• Strong understanding of hardware/software co‑design for inference acceleration.
• Experience working with low‑power edge platforms, NPUs, custom accelerators, GPUs, or closely related architectures.
• Ability to reason about memory allocation, execution scheduling, bandwidth constraints, and overall system performance.
• Experience translating research concepts into practical tooling and production workflows.
• Strong cross‑functional communication skills and the ability to lead through technical influence.

• Experience with quantization‑aware training, post‑training quantization, compression, pruning, and sparsity optimization.
• Experience bringing vision or…