PCIe Verification Design Engineer

We are looking for a PCIe Verification Design Engineer to join AMD (Longmont, CO). This is a full‑time, mid‑senior role focused on design and verification of PCIe/CXL, DMA, and related solution IPs.

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture.

The focus of this role is to plan, build, and execute the verification and validation of new and existing features for AMD’s programmable devices and to focus on PCIe/CXL, DMA, and associated solution IPs.

• Passion for modern, complex SoC architecture, digital design, verification, and validation.
• Team player with excellent communication skills and experience collaborating with engineers in different sites/time zones.
• Strong analytical and problem‑solving skills; willing to learn and take on challenges.
• Strong expertise in one area of design/verification/validation, with exposure to all aspects.

• Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified.
• Architect moderate‑complexity RTL designs to integrate into the larger SoC.
• Build test plan documentation, accounting for interactions with other features, hardware, firmware, and software driver use cases.
• Estimate the time required to write new feature tests and any required changes to the test environment.
• Build directed and random verification tests using class‑based verification techniques; preferably UVM.
• Debug simulation, in‑lab, or production system failures to determine root cause; work with RTL and firmware engineers to resolve design defects and correct issues.
• Review functional and code coverage metrics—modify or add tests or constrain random tests to meet coverage requirements.

• Proficient in complex IP ownership, preferably in high‑speed I/O such as PCIe/CXL, DDR, Ethernet, Video.
• Proficient in debugging firmware and RTL code using simulation and/or emulation tools.
• Proficient in UVM test benches and working in Linux and Windows environments.
• Experience with System Verilog.
• Developing UVM‑based verification frameworks and test benches, processes, and flows.
• Automating workflows in a distributed compute environment.
• Exposure to simulation profile and efficiency improvement.
• Strong background in EDA tools, preferably on Linux.
• Good understanding and hands‑on experience with UVM concepts and System Verilog language.
• Scripting language experience: TCL, Python, Bash, CSH.
• Familiar with FPGA and Adaptive SOC architectures and development tools.

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or related field.

Benefits offered are described: AMD benefits at a glance.

AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.