AI Silicon TPM: Backend/NPI Lead Data-Center Chips
Listed on 2026-10-16
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Software Development
Backend Developer
Majestic Labs is seeking an experienced Silicon Technical Program Manager (TPM) to coordinate backend execution and New Product Introduction for data-center-grade AI chips. You will bridge hardware design, backend implementation, and post-silicon qualification.
Lead multi-chip schedules from RTL freeze through physical implementation, tapeout, and high-volume production. Strong communication across backend design, DFT, and product engineering teams is essential.
Step into the AI Silicon TPM:
Backend/NPI Lead for Data-Center Chips role at Majestic Labs ai in Los Altos, CA, United States and grow with us.
Learn more about the AI Silicon TPM:
Backend/NPI Lead for Data-Center Chips role in the description above.
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