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Principal FPGA​/RTL Design Engineer - Signal Processing

Job in Los Angeles, Los Angeles County, California, 90079, USA
Listing for: Silvus Technologies
Full Time position
Listed on 2025-12-16
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 125000 - 195000 USD Yearly USD 125000.00 195000.00 YEAR
Job Description & How to Apply Below
Position: Principal FPGA / RTL Design Engineer - Signal Processing

Principal FPGA / RTL Design Engineer - Signal Processing

THE COMPANY

Silvus Technologies is dedicated to one mission: connecting those who keep us safe. We do so by delivering the most advanced Mobile Ad-hoc Network (MANET) radios powered by our custom and ever-evolving Mobile-Networked MIMO waveform. Together, our radios and waveform provide the vital communications for mission critical applications in the harshest environments from underground tunnels to high altitude balloons.

Silvus Stream Caster radios are being rapidly adopted by customers all over the world ranging from the U.S Departments of Defense, to International, Federal, State and Local Law Enforcement agencies, all the way to the Super Bowl, Grammys and industry-leading drone, robot, and other unmanned systems manufacturers.

Wouldn’t you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of “Keeping Our Heroes Connected”?

Silvus’ rapid growth is fueled by a focus on research and innovation and a team of the most passionate, skilled, and creative thinking individuals. If you are looking for a challenging experience, you owe it to yourself to learn how Silvus can provide a rewarding opportunity that creates a pathway to a fulfilling career.

THE OPPORTUNITY

Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work closely with the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products.

In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects aimed at addressing challenging real-world communication needs.

The Principal FPGA / RTL Design Engineer position will be based at Silvus headquarters in the heart of vibrant West Los Angeles, CA and is on a hybrid schedule; a minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.

ROLE AND RESPONSIBILITIES

  • Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks.
  • RTL coding, simulation, and test bench development.
  • FPGA synthesis and timing closure.
  • Hardware verification and troubleshooting; familiarity with logic analyzers.
  • Provide support to the RF and Software Engineering Teams.

REQUIRED QUALIFICATIONS

  • Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant fields.
  • Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or relevant fields.
  • Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
  • Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
  • Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • NOTE - Must be a U.S. Person (U.S. Citizen, or U.S. Permanent Resident) due to clients under U.S. federal contracts.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES

  • MS. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant fields.
  • Basic MATLAB skills.
  • Solid knowledge and understanding of scripting languages such as Perl and Python.
  • Strong communication and presentation skills.
  • Experience with wireless communication systems on FPGA or ASIC designs.

COMPENSATION

The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate’s experience and qualifications.

CA Pay Range $125,000 - $195,000 USD

Silvus is proud to be an equal-opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive benefits and privileges of employment. Please contact us to request accommodation.

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