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Senior Memory PHY Architect — Lead ‑Speed I/O & SoCs
Job in
Los Angeles, Los Angeles County, California, 90001, USA
Listed on 2026-10-20
Listing for:
AMD
Full Time
position Listed on 2026-10-20
Job specializations:
-
Engineering
Hardware Engineer -
Design & Architecture
Job Description & How to Apply Below
A leading semiconductor company is seeking a Senior Technical Leader to shape Memory PHY technology. You will drive architectural direction and technical decisions for cutting-edge designs in mixed-signal circuits and influence critical project outcomes. Ideal candidates will have over 15 years’ experience in analog and mixed-signal design, especially in high-speed technologies. Join a collaborative team that values deep technical ownership and innovation, while shaping the future of computing architecture.
Consider building your career as a Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs following opening is for a Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs with AMD. Our team is growing, and we are hiring a Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs in Santa Clara, CA, United States.
Position Requirements
10+ Years
work experience
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