Senior Analog IC Design & Verification Engineer; RSU Equity
Listed on 2026-11-05
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Engineering
Electronics Engineer
Neuralink is seeking an engineer to design analog and mixed-signal ICs, from circuit design to layout and verification, with responsibility for high-performance blocks and IP validation. The role involves planning verification, running simulations, mentoring juniors, and coordinating with internal/external users and vendors.
The ideal candidate has a BS in electrical engineering with 5+ years' experience in CMOS analog/mixed-signal design and strong problem-solving skills.
The following opportunity is for a Senior Analog IC Design & Verification Engineer (RSU Equity) with Neuralink.
Our group is growing, and we are hiring a Senior Analog IC Design & Verification Engineer (RSU Equity) in CA, United States.
This position is for the Senior Analog IC Design & Verification Engineer (RSU Equity) role at Neuralink.
We are seeking a motivated Senior Analog IC Design & Verification Engineer (RSU Equity) to join Neuralink in CA, United States.
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