Digital Verification Engineer – First Silicon DV

A leading technology company in California is seeking a motivated design verification engineer to enhance their silicon development processes. This role focuses on creating comprehensive verification methodologies, with a strong emphasis on System Verilog and UVM, ensuring the development of efficient test environments. Ideal candidates will possess solid backgrounds in verification methods and have experience with both serial and parallel protocols.

Competitive salary, stock options, and extensive benefits included.
Are you ready to take on the Digital Verification Engineer – First Silicon DV role at Apple? We would love to welcome a new Digital Verification Engineer – First Silicon DV to our organisation in Los Angeles, CA, United States. For the Digital Verification Engineer – First Silicon DV position at Apple, we are reviewing applications now. Step into the Digital Verification Engineer – First Silicon DV role at Apple in Los Angeles, CA, United States and grow with us.