Senior FPGA Design Engineer — Secret Clearance Eligible
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Engineering
Job Description & How to Apply Below
Northrop Grumman is seeking an FPGA Digital Design Engineer Level 3 to join our team at Northridge, CA. This full-time, on-site role focuses on FPGA/ASIC design across the full product lifecycle, applying Model-based Engineering, Dev Sec Ops and Agile practices to deliver critical national defense capabilities.
The position requires a strong background in digital signal processing, VHDL/Verilog, and experience with SoC FPGAs, EDA tools, and DOORS.
This posting is for the Senior FPGA Design Engineer — Secret Clearance Eligible role at Northrop Grumman, based in Los Angeles, CA, United States.
As a Senior FPGA Design Engineer — Secret Clearance Eligible, you will play an important part at Northrop Grumman in Los Angeles, CA, United States.
We invite applications for the Senior FPGA Design Engineer — Secret Clearance Eligible position located in Los Angeles, CA, United States.
Position Requirements
10+ Years work experience(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
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