Timing Design Engineer: -Impact PHY​/SoC Timing & Equity

Apple is seeking a Timing Design Engineer in Madison to lead static timing analyses and closure on high‑performance PHY/SOC blocks. You will collaborate with RTL, CAD, and layout teams to deliver timing‑driven designs and implement ECOs to fix issues, ensuring power and performance targets are met.

The role focuses on timing closure, physical design coordination, and contributing to next‑generation Apple products. BS degree and 3+ years of relevant experience required.

Are you ready to take on the Timing Design Engineer:
High-Impact PHY/SoC Timing & Equity role at Apple, Inc.?

The position is based in Madison, WI, United States.

This opportunity is part of our work in Engineering.

The advertised compensation is 139..

We aim to respond to suitable candidates as soon as possible.

Full responsibilities and requirements are described in the listing above.