GPU Power Aware Design Verification Engineer

Company:

Qualcomm India Private Limited

Engineering Group, Engineering Group >
Hardware Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what’s possible to enable next‑generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring‑up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting‑edge, world‑class products.

Qualcomm Hardware Engineers collaborate with cross‑functional teams to develop solutions and meet performance requirements.

• Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Qualcomm’s GPU team delivers industry‑leading graphics solutions that power Snapdragon‑based devices across mobile, compute, automotive, XR and low‑power edge platforms. As a Power Aware Design Verification (DV) Engineer, you will own low‑power verification of advanced GPU IP blocks and subsystems, ensuring robust power intent implementation and UPF‑driven power‑aware verification across multiple GPU generations.

This role requires strong expertise in SV/UVM‑based verification environments, power‑aware methodologies, and UPF‑based low‑power verification. You will collaborate closely with architects, RTL design, PD, emulation and software teams to ensure first‑time‑right silicon.

• Understanding of GPU power domains and HW programming guide sequences
• Own power‑aware UVM test benches and develop test plans to verify all low‑power states
• Own end‑to‑end DV tasks from coding test benches and test cases, write assertions, debug UPF and RTL and achieve all coverage goals
• Participate in post‑Si debug and bring‑up activities
• Explore innovative dynamic or static methodologies by engaging with EDA vendors

• Work closely with design, architecture, emulation, SW driver teams to root‑cause issues.
• Drive bring‑up of low‑power GPU features on simulation/emulation platforms.
• Contribute to methodology improvements, automation, and flow enhancements for power‑aware verification.

• 2+ years of Design Verification experience with a Master’s degree from a Tier‑1 engineering institute OR
• 3+ years of DV experience with a Bachelor’s degree from a Tier‑1 engineering institute

• System Verilog/UVM based verification skills & experience with assertion & coverage‑based verification methodology
• Experience in formal / static verification methodologies will be a plus
• Good understanding of low power design techniques
• Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells.
• Experience with UPF based power aware verification.
• Working knowledge of GLS, PAGLS and scripting languages such as Perl, Python is a plus

• Work on cutting‑edge low‑power GPU architectures used across billions of devices.
• Contribute to industry‑leading perf/Watt GPU designs.
• Be part of a global, high‑impact GPU team driving next‑generation graphics innovation.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disabili or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.

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