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Job Description & How to Apply Below
Qualcomm Canada ULC
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary
Qualcomm enables a world where everyone and everything can be intelligently connected. As the world's leading wireless tech innovator, we push the boundaries of what's possible to enable next‑gen experiences and drive digital transformation to help create a smarter, connected future for all. Our roadmap of breakthrough technologies expands our mobile innovations and solutions to support virtually every connected device. With our leadership in wireless connectivity, high‑performance, low‐power computing, and on‑device AI, we’re powering the connected intelligent edge.
We are searching for an ASIC verification engineer interested in developing world‑class solutions for the next generation of AI/ML and video processing IP.
This is New Position.
Principal Duties
Verification and modelling of multimedia and compute ASIC modules and sub‑systems
Verify features and performance of IP‑level RTL using coverage‑driven, constrained‑random methodologies in System Verilog (i.e. UVM/OVM)
Create comprehensive verification plans to describe the functional/feature test points of the DUT, and present the plan to the IP team
Develop reusable testbench components such as scoreboards, reference models, checkers, drivers, monitors, and VIPs using System Verilog/UVM and C/C++
Create functional coverage models to track the IP verification quality relative to the DV plan
Develop SVA assertions for functional and formal verification
Optimize coverage and test platform delivery processes using AI toolsets
Implement verification methodology and automation using scripts (e.g. Python, Perl)
Create performance verification monitors, models, and test scenarios
Develop and support a regression and coverage flow to ensure high DV quality
Preferred Qualifications
2+ years in ASIC design verification
Proven experience verifying Verilog and/or System Verilog RTL designs
Working experience using testbench components such as Interface VIPs, reference models, scoreboards, transactors
Experience with several of the following tools/techniques
Functional model development (UVM, System
C, SVAs, and/or C++)
Simulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)
Design rule and Multi‑frequency and CDC verification (SVA assertions)
Bus implementation/verification techniques
Verification automation using Python, PERL, or other scripting languages
Practiced verification of one or more of the following
Data and/or image processing pipelines
Cache controllers
Clock domain crossing and Reset architecture
Bus interface protocols (APB, AHB, AXI) and RTL
FIFOs and memory controllers
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑ or call Qualcomm's toll‑free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.
Qualcomm is also committed to making our workplace accessible for individuals with disabilities.
Pay range and Other Compensation & Benefits
$90,100.00 - $
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus).
In addition, our highly competitive benefits package is designed to support your success at work, at home, and r recruiter will be happy to discuss all that Qualcomm has to offer.
For more information about this role, please contact Qualcomm Careers.
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