Synopsys Principal Analog Layout Engineer

Position: Synopsys Principal Analog Layout Engineer Role
Join Synopsys as a Principal Analog Layout Engineer and lead innovations in high-speed Ser Des design.

Your role will define methodologies that enhance product excellence in a fast-paced setting.
In this position at Synopsys, you’ll leverage your extensive background in high-speed layout to improve methodologies for next-gen Ser Des IP. You will manage project deliverables, act as the technical interface for clients, and drive the creation of scalable processes that empower engineering teams globally. Collaborate, mentor, and ensure high-quality outcomes through effective communication and leadership.

Key Responsibilities:

• Manage layout scope, deliverables, and schedules

• Drive technical dialogues with clients and teams

• Conduct debugging and resolution of layout challenges

• Collaborate on advanced packaging techniques

• Innovate layout methodologies using industry-standard tools
Requirements:

• In-depth experience with high-speed Ser Des layouts

• Expertise in ESD design constraints and layout reliability

• Proven debugging and layout issue resolution skills

• Proficient in layout tools like Synopsys Custom Compiler

• Familiar with project tracking software like Jira
Contribute to the future of semiconductor design at Synopsys, shaping quality and competitiveness in advanced technologies.
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