Innovative ASIC IP Core Designer

Pioneer advanced ASIC designs as an Innovative IP Core Designer. Utilize your Verilog expertise to contribute to next-generation networking technologies and solutions.
You will be at the forefront of RTL design, working on high-performance IP cores that support various applications. This role emphasizes collaboration with architecture, verification, and SoC integration teams to deliver exceptional design results. Your efforts will focus on optimizing design processes using AI tools while coaching junior talent within the team.

Key Responsibilities:

• Create high-quality RTL for advanced ASIC projects

• Collaborate with multi-disciplinary teams for successful designs

• Implement AI tools to enhance code efficiency and productivity

• Support the Emulation Team in their testing activities

• Provide mentorship to developing designers
Requirements:

• Expertise in Verilog/System Verilog and ASIC architecture

• Experience with simulation and debugging tools

• Strong background in digital communication protocols

• Bachelor’s or Master’s in Computer/Electrical Engineering

• Familiarity with workplace AI and scripting languages
Channel your innovative spirit to design groundbreaking ASIC solutions for diverse digital communication systems.
#J-18808-Ljbffr