CPU Performance Engineer - Display

Company:

Qualcomm Canada ULCJob Area:

Engineering Group, Engineering Group  Systems Engineering General

Summary:

Do you love working on state‑of‑the‑art technologies? Are you a visionary who enjoys solving complex technological and architectural challenges? At Qualcomm, our System Architecture team offers a collaborative, hands‑on environment that fosters engineering excellence, creativity, and innovation. In this highly visible role, you will be part of the System Architecture team driving a high‑performance, low‑power Display Processing Unit (DPU).The DPU is an integral component of Qualcomm Snapdragon platforms across multiple business units, including mobile, automotive, VR, and wearable.

It is responsible for composing the final image displayed on the panel. The Display Co‑Processor (DCP) is a RISC‑V–based processor that offloads display‑related tasks from the main application processor. It serves as a dedicated engine that manages display timing, formatting, and coordination to ensure smooth, efficient, and power‑optimized display operation. New Position The responsibilities of this role include:

Microarchitectural workload analysis:
Analyze real‑world and synthetic workloads to identify IPC, latency, bandwidth, cache hierarchy, and QoS bottlenecks across the CPU pipeline

Pre‑silicon architectural modeling:
Develop and maintain CPU architectural and microarchitectural performance models; evaluate design trade‑offs through what‑if studies (e.g., pipeline depth, execution resources, cache structures, memory latency tolerance)
RTL and silicon correlation:
Correlate architectural models with RTL and post‑silicon measurements to validate assumptions and guide design refinements

System‑level performance analysis:
Assess CPU interactions with NoC, memory subsystem, QoS/MPAM mechanisms, and power‑management features, and quantify their impact on performance and efficiency

Cross‑disciplinary collaboration:
Work closely with CPU architects, RTL design and verification teams, SoC performance teams, and software partners to drive informed architecture decisions

Key Qualifications5+ years of experience in modern CPU architecture and microarchitecture, with a focus on performance, power efficiency, and parallelism5+ years of programming experience in C/C++, and scripting languages such as Perl and/or Python Strong understanding of CPU microarchitecture concepts such as pipelines, out‑of‑order execution, cache and memory hierarchies, and performance bottleneck analysis

Experience with CPU performance benchmarking, workload characterization, and model‑to‑RTL/silicon correlation

Strong analytical, critical‑thinking, and problem‑solving skills applied to complex architectural trade‑offs Excellent written and verbal communication skills, with the ability to clearly present architectural insights and recommendations

Minimum Qualifications:

Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.

ORPhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Applicants :
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disabili or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.

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