IP Verification Engineer

Location

Markham, ON, (Onsite/Hybrid)

12 months contract (With possible extension)

$55/hr. to $63/hr. on T4 (all inclusive)

• The client’s IP Systems Engineering Team is on the lookout for a dynamic, energetic IP Systems Engineer to join our growing team. As a key contributor to the success of DCN IP, you will be part of a leading team to drive and enhance client’s abilities to deliver the highest quality, industry leading technologies to market. The IP Systems Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

• Dynamic, self-starter who has a passion for improving and innovating! As Systems Engineer, you will drive the planning, verification, and debug of various DCN hardware IP for forthcoming APU SOC programs.

• Defining and executing the overall functional test plan and verification strategy for the DCN IP
• Driving technical innovation to enhance capabilities in DCN IP validation/verification, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives.
• Debug of DCN IP issues found during pre-silicon, bringup, validation, and production phases of SOC programs
• Working closely with supporting teams in design, diagnostics, emulation, firmware, and driver to ensure readiness for first silicon arrival, enablement of DCN IP functionality, and debug of critical features.
• Engaging on pre-silicon verification efforts, including but not limited to FPGA-based emulation, Design Verification (DV), and other software/hardware modeling frameworks.
• Leading collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives
• Developing knowledge of system architecture/debug and other IP’s Supporting issues on customer platforms as requested by customer support teams

• Proven (2+ yeras) Experience in digital logic/platform design, verification, or post-silicon verification.
• Experience with ASIC debug techniques and methodologies
• Experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
• Experience with board/platform-level debug, including clock/power delivery, sequencing, analysis, and optimization
• Knowledge of physical and protocol levels of common high-speed interfaces an asset In-depth knowledge of PC architectures an asset
• Must have excellent written and verbal communication skills Must excel in a dynamic team working environment Leadership and mentoring skills a definite asset
• Must be a self-starter and be able to independently drive tasks to completion Ability to be flexible in terms of responsibilities

• Bachelors or Masters Degree in Electrical or Computer Engineering