Analog Mixed Signal Layout Engineer at Synopsys

Drive innovation at Synopsys as an Analog Mixed Signal Layout Engineer. Leverage your expertise in Custom Compiler SDL or Virtuoso XL for layout optimization in a hybrid environment.

With over 5 years of experience in electrical engineering, you will focus on creating and refining analog mixed signal layouts while ensuring EMIR awareness and device matching.

Your role involves collaborating with global teams while conducting thorough DRC, LVS, Antenna, and DFM checks. You will also document methodologies and share best practices across the team.

Key Responsibilities:

• Create optimized analog layouts focusing on EMIR and parasitics

• Own macro floor planning and layout coordination

• Resolve physical verification checks efficiently

• Perform PERC verification for ESD and latch-up

• Automate layout and verification flows through scripting

Requirements:

• Bachelor’s or Master’s in Electrical Engineering or related field

• 5+ years in analog mixed signal layout experience

• Proficiency in Custom Compiler SDL or Virtuoso XL

• Strong understanding of layout verification processes

• Scripting skills in TCL, Perl, or Python preferred

Elevate design quality by delivering layouts that pass verification seamlessly while sharing automation insights at Synopsys.
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