Senior RTL Design Engineer

Elevate your career as a Senior RTL Design Engineer based in Markham, Canada. Leverage your Verilog HDL skills to implement and debug complex designs in a contract role.
This position requires over 10 years of experience in RTL design and knowledge of System on Chip level specifications. You will be responsible for writing microarchitecture specifications, linting, and simulating designs. Collaborating with synthesis and backend teams will be crucial for successful physical implementation.

Key Responsibilities:

• Utilize Verilog HDL for RTL design and debugging

• Comprehend System on Chip level architectural specifications

• Draft microarchitecture specifications for new features

• Conduct linting and simulation of designs

• Collaborate with synthesis and backend teams for implementation
Requirements:

• Minimum 10 years of RTL design experience

• Proficient in Verilog HDL and simulation tools

• Strong understanding of System on Chip architecture

• Bachelor's or Master's in Computer Engineering

• Ability to work in a contract role for 6 months
This role cultivates your RTL design expertise while contributing to innovative projects in Markham.
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