Compute DSP​/AI Subsystem Validation Engineer; Engineer level

Company

Qualcomm Canada ULC

Engineering Group, Engineering Group > ASICS Engineering

Qualcomm enables a world where everyone and everything can be intelligently connected. As the world's leading wireless tech innovator, we push the boundaries of what's possible to enable next‑gen experiences and drive digital transformation to help create a smarter, connected future for all. Our roadmap of breakthrough technologies expands our mobile innovations and solutions to support virtually every connected device. With our leadership in wireless connectivity, high‑performance low‑power computing, and on‑device AI, we’re powering the connected intelligent edge.

• Contribute to IP verification during the pre/post silicon phase of next generation SOC
• Collaborate with design and software teams to debug and resolve issues
• Design and translate high level customer use to hardware specific verification plans
• Develop and automate test plans; refactor and optimize test code
• Manage validation and testing of the driver/hardware
• Migrate/integrate cross team drivers to new platforms as test required
• Delivery of low-level hardware drivers for Qualcomm Snapdragon Subsystems validation
• Support post-silicon bring‑up, functional, and performance testing
• Perform power correlations, analysis and reporting

• You will have a minimum of 1-3 years of experience
• Experience in low level and/or embedded software development in C, C++, Assembly and Python.
• Experience with Windows and Linux OS environment
• Experience in ARM, DSP processors, Windows/Linux environments.
• Experience in automation and test/integration methodologies
• Experience developing/enhancing validation methodologies and infrastructure solutions
• Experience with SCM tools (Git, Perforce), and defect tracking (JIRA).
• Experience with digital and analog circuit is a strong asset
• Good communication skills (written and verbal)
• Strong debug skills

• Developing and optimizing test framework and tools to create a controlled validation environment to support large scale validation
• Designing and defining new validation strategy as well as detailed test plans
• Help debug efforts for issues found during Pre‑silicon (FPGA) and Post‑silicon
• Define, design, and execute platform Pre‑Silicon and Post‑Silicon validation plans for current and future products
• Debug hardware/software issues using Lauterbach Trace
  32 (T32) for register access, memory analysis, and automation.
• Experience with low‑power modes, power/performance characterization, and correlation analysis.

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Applicants:
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.

Pay range: $ - $. This pay scale reflects the broad minimum to maximum pay range for this job code for the location for which it has been posted. In addition, Qualcomm offers a competitive annual discretionary bonus program and opportunity for annual RSU grants. The highly competitive benefits package is designed to support your success at work, at home, and at play.