Senior Analog Designer SERDES IP

Position: Senior Analog Designer for SERDES IP
Drive innovation in SERDES IP design as a Senior Analog Designer, providing essential pre-silicon and post-silicon support with a focus on integrity evaluations. Your expertise ensures seamless function and performance enhancements.

In this critical role, you will conduct electrical evaluations to assure power, signal, and clock integrity for SERDES IP. This includes supporting post-silicon teams with compliance testing, characterization, and functional analysis of third-party IP. Your hands-on experience with SERDES or memory PHY designs will be vital in this capacity.

Key Responsibilities:

• Conduct electrical evaluations for signal integrity and power performance

• Provide pre-silicon and post-silicon support for SERDES IP

• Assist post-silicon teams with compliance and functional testing

• Screen and characterize third-party IP effectively

• Evaluate clock distribution metrics, including jitter and DCD

Requirements:

• Experience with SERDES or memory PHY designs

• Strong knowledge of power noise characteristics

• Understanding of signal integrity concepts

• Familiarity with characteristic and termination impedance

• Expertise in clock distribution and metrics

Leverage your design skills to enhance the performance of SERDES IP.
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