Sr. Manager Packaging Engineering Job Markham area,Ontario Canada,Engineering

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture.

We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.
Together, we advance your career.

THE ROLE:

Help turn “possibility” into “reality” by leading the design execution of next-generation Data Center GPU and MI programs. This role represents a critical leadership position responsible for delivering high-performance, high-complexity package designs in a fast-paced environment.

In this role you will lead cross-functional teams across design, Signal/Power Integrity, substrate vendors, OSAT partners, and program management to ensure successful execution of multiple concurrent programs. You will drive operational excellence, scale execution using automation and AI-enabled methodologies, and deliver best-in-class package solutions that meet aggressive timelines and technical requirements.

KEY RESPONSIBILITIES:

Program & Execution Leadership

Lead end-to-end execution of multiple Data Center GPU / MI package design programs, ensuring schedule, quality, and cost targets are consistently met.

Drive execution in fast-paced, dynamic, and high-pressure environments, managing competing priorities across programs.

Establish and maintain robust execution frameworks, including milestone tracking, risk management, and readiness gates.

Interface with senior leadership to provide clear program status, risks, and mitigation strategies.

Team Leadership & Development

Lead, mentor, and grow a high-performing team of package design engineers across geographies.

Foster a culture of accountability, innovation, and continuous improvement aligned with AMD engineering excellence.

Conduct performance reviews, talent development planning, and succession management.

Technical & Cross-Functional Leadership

Collaborate with silicon, SI/PI, thermal, mechanical, and manufacturing teams to ensure design convergence.

Engage with OSAT and substrate vendors to drive design feasibility, manufacturability, and yield optimization.

Process & Methodology Innovation

Define and drive improved design methodologies, workflows, and best practices to enhance execution efficiency.

Champion adoption of AI/ML-enabled tools and automation (e.g., layout optimization, design rule checking, predictive analytics) to improve productivity and decision-making.

Scale digital transformation initiatives within the package design organization.

PREFERRED EXPERIENCE:

Experience in semiconductor package design, with strong focus on high-performance or data center products.

Proven experience leading teams and executing multiple concurrent complex projects in fast-paced environments.

Strong understanding of package layout, high-speed design considerations, and multi-die integration.

Experience with AI/ML applications in engineering workflows (design automation, data analytics, optimization).

Excellent leadership, communication, and stakeholder management skills.

Demonstrated ability to handle ambiguity, drive decisions, and deliver under pressure.

Experience working with OSATs, substrate vendors, and manufacturing partners.

Hands-on experience with industry tools such as Synopsys 3

DICC, Cadence SiP / APD or equivalent.

Experience in Data Center GPU, HPC, or advanced packaging technologies (e.g., chiplets, 2.5D/3D integration).

EDUCATION REQUIREMENTS: B.S. or higher in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field.

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