RTL and IP Logic Design Engineer

Step into a pivotal role at AMD as an RTL and IP Logic Design Engineer. Drive innovation in ASIC design and contribute to first-pass silicon success in Markham, Ontario.

As part of the T&E NBIO/PCIe Subsystem team, you will oversee technical aspects of the design lifecycle.

Your role encompasses optimizing RTL designs and collaborating closely with architecture and verification teams to address challenges effectively. You will also provide valuable post-silicon support and ensure designs meet rigorous quality standards.

Key Responsibilities:

• Lead ASIC architecture, IP development, and design execution

• Optimize RTL and logic designs for power and performance

• Foster collaboration to resolve design and integration issues

• Support post-silicon bring-up activities

• Conduct design reviews and debug regressions

Requirements:

• Strong background in ASIC design and architecture

• Proficient in RTL design with Verilog

• Experience in high-speed protocol designs

• Skilled in using VCS or similar tools

• Degree in Electrical or Computer Engineering recommended

Leverage your skills at AMD to innovate in silicon technologies.