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Sr ASIC Design Verification Engineer, Low Power AI

Job in Markham, Ontario, I3P, Canada
Listing for: QUALCOMM, Inc.
Full Time position
Listed on 2026-10-18
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 130000 - 180000 CAD Yearly CAD 130000.00 180000.00 YEAR
Job Description & How to Apply Below
Company:

Qualcomm Canada ULCJob Area:

Engineering Group, Engineering Group  ASICS Engineering General

Summary:

What we are doing has not been done.

Shape the future of low power AI subsystems.

Push the boundaries on features and performance.

Qualcomm Technologies Audio AI products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues.

As we pioneer new and/or improved functionality, we innovate to minimize power consumption.

Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum. New Position.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

ORMaster's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

ORPhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

We are looking for a Senior ASIC Verification Engineer to be part of our team to innovate and design complex leading, ultra-low power, solutions for audio and AI/context aware applications.

Verification tasks will include:

Contribute to core verification during the pre/post silicon phase of next generation ASICs through simulation

Drive test plan development, execution and verification closure in conjunction with the design and verification teams

Contribute to creating/maintaining a test bench, assertions, and functional coverage models with scalability and reuse as key goals

Contribute to implementing flows to automate development processes. Identify areas for improvement and drive them to completion

Lead complex debug activities through the development cycle (pre and post-silicon)
Provide technical supervision to other engineers and have the ability to lead by example

Work closely with design to define verification methodology, Provide test plans and develop required tests.

Specific responsibilities will be a function of project and team needs and may vary over time.

Requirements:2+ years ASIC design, verification, implementation or related work experience

Expert Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.Deep understanding of ASIC/VLSI concepts

Expert hardware verification languages (HVL):
System Verilog testbench (UVM), and/or SystemC,Expert hardware description languages (HDL):
Verilog and/or System Verilog Good  working experience with C (basic level or C++ sufficient)

Preferred Qualifications:

Knowledge in one or more of the following disciplines is preferred:
Audio (MP3, MIDI, etc.), Bus/interconnect (AHB, AXI), CPU (ARM v8/v7, Cache, MMU, security, etc.).Strong knowledge of digital circuits and event-driven simulators

Knowledge of Perl, tcsh, Python and GNU Make is a strong asset

Experience with automotive safety concepts and standards such as ISO
26262

Applicants :
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disabili or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate…
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