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ASIC Digital Design Engineer

Job in Markham, Ontario, I3P, Canada
Listing for: Qualcomm Incorporated
Full Time position
Listed on 2026-10-23
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 130000 - 180000 CAD Yearly CAD 130000.00 180000.00 YEAR
Job Description & How to Apply Below

Design next-generation power control systems at Qualcomm Canada ULC using Verilog, System Verilog, and advanced ASIC development practices.

This ASIC Digital Design Engineer develops complex RTL for high-performance, low-power products. The work spans architecture, microarchitecture, implementation, and subsystem integration across the VLSI development cycle. Collaboration includes verification, synthesis, physical design, DFT, systems, and software teams.

Key Responsibilities:
  • Develop digital designs using Verilog, VHDL, and System Verilog
  • Create microarchitecture for next-generation power control systems
  • Integrate complex subsystems into SoC designs
  • Coordinate with multisite leads across United States and India
  • Analyze reports and run ASIC development tools
Requirements:
  • Five to eight years of digital ASIC front-end design experience
  • Expertise with complex multi-clock and multi-power-domain RTL
  • Experience with UPF and power-domain crossing
  • Familiarity with AHB, AXI, SPMI, I2C, and SPI
  • Expertise in Perl and TCL languages

Apply ASIC design expertise, RTL development, and low-power methodology to Qualcomm power control systems.

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