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Senior Emulation Methodology & Debug Engineer
Job Description & How to Apply Below
Company
Qualcomm Technologies, Inc.
Job Area
Engineering Group, Engineering Group ASICS Engineering
General Summary
Senior Emulation Performance Methodology & Debug Engineer
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Preferred Requirements
5+ years of experience working in emulation and silicon environments.
Design, development, and deployment of uniform global methodologies for emulation build generation and debug across FPGA based emulation platforms of various configurations
Cross-site collaboration, vendor engagements, and executive communication
Pre-silicon prototyping for new SoC designs, including pre-silicon enablement and bring-up
Bring-up of new FPGA emulation/prototyping hardware and software
Debugging low level software and hardware issues
Debug tools including JTAG and kernel debuggers
Validation and debug of digital circuits
CPU and SoC architectures, with solid understanding of SoC building blocks (interconnects, power management, PMIC, NoC, peripherals)
Basic understanding of power and performance
Expertise in Verilog / System Verilog
Experience with C programming
Scripting:
Proficient in Python, TCL
FPGA Expertise:
Xilinx/Intel FPGAs, Tools, and timing closure techniques
Pay Range and Other Compensation & Benefits
$ - $
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus).
In addition, our highly competitive benefits package is designed to support your success at work, at home, and r recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
Job Description
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next‑generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
Qualcomm's Emulation Team Is Part Of The Central SoC Digital Hardware Organization Responsible For The Overall Development And Support Of SoC Pre‑silicon Platforms. The Emulation Team Works Closely With Architects, Designers, Verification Engineers, Software Engineers, And Customers. The Team Is Currently Seeking Candidates With Experience In The Following Technical Disciplines, Languages, And Methodologies:
Emulation Platforms (FPGA Prototyping, Veloce, Palladium), Emulation tools (Synthesis, Place and Route, Constraints, Clocking, Timing Closure), System Debug (Waveform generation and Content Debug support)
SoC Functionality (CPU/DSP Core, Multimedia, IO, Peripherals, DDR, Modem, Bus Protocols)
Equal Opportunity
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an…
Position Requirements
10+ Years
work experience
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