Senior Analog Design Architect Speed IP
Synopsys, Inc. is seeking a senior analog/mixed-signal IC design engineer to advance high-speed CIRCUITS in FinFET nodes.
You will review JEDEC standards, define sub-block specs for DDR/LPDDR, HBM, UCIe, and mobile storage IP, and design transistor-level circuits with a focus on reliability and performance. Ideal candidates hold a PhD with extensive experience or a Master’s with substantial industry background.
We are currently recruiting a Senior Analog Design Architect – High-Speed IP for our team in Markham, ON, Canada.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Analog Design Architect – High-Speed IP role in the description above.
We appreciate your interest in this position.
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